Vlsi Design of 32 Bit×32 Bit Razor-based Dynamic Voltage Scaled Multi Precision Multiplierfor Low- Power Applications
نویسندگان
چکیده
Multiprecision (MP) reconfigurable multiplier that incorporates variable precision, parallel processing (PP), razor-based dynamic voltage scaling (DVS), and dedicated MP operands scheduling to provide optimum performance for a variety of operating conditions. All the building blocks of the proposed reconfigurable multiplier can either work as independent smallerprecision multipliers or work in parallel to perform higher-precision multiplications. Given the user’s requirements (e.g., throughput), a dynamic voltage/frequency scaling management unit configures the multiplier to operate at the proper precision and frequency. Adapting to the run-time workload of the targeted application, razor flip-flops together with a dithering voltage unit then configure the multiplier to achieve the lowest power consumption. The singles witch dithering voltage unit and razor flip-flops help to reduce the voltage safety margins and overhead typically associated to DVS to the lowest level. The large silicon area and power overhead typically associated to reconfigurability features are removed.
منابع مشابه
Modified 32-Bit Shift-Add Multiplier Design for Low Power Application
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